Quant jobs / Westbury Partners

Ultra-Low-Latency FPGA Engineer – Electronic Trading

A recruiter seeks an FPGA engineer for an unnamed electronic-trading team. The role implements market-data and execution logic in hardware and optimises production latency.

What you’d work on

Our reading of the posting: what a new hire in this role would most likely spend their first months on.

Design FPGA paths for feed parsing and trading execution.
Build simulation and benchmarking tools.
Profile hardware and network performance for latency improvements.

What they ask for

Required

FPGA or ASIC design
VHDL, Verilog or SystemVerilog
C++, C or Python
Network and exchange protocols
Digital hardware architecture

Education: Academic qualification in computer or electrical engineering, or a related area; level not specified.
Experience: At least 5 years in relevant financial markets or FPGA work.
Languages and tools: VHDL
Verilog
SystemVerilog
C++
C
Python
Vivado
Quartus
Synplify

How to prepare

Implement and verify a small market-data parser in hardware.
Benchmark latency through transceivers and processing logic.
Design fault and recovery tests for a real-time trading path.

What to study

The HFT Quant Developer roadmap sets out the stages for this kind of role, with free resources for each.

Open the roadmap

Apply

Read the full posting on Westbury Partners’s site before applying: requirements, location and pay can change after we check them.

View the posting on Westbury Partners’s site ↗

SelfMadeQuant wrote this summary from the employer’s public posting, last checked 6 November 2026. SelfMadeQuant isn’t affiliated with Westbury Partners and doesn’t handle applications.